DVB-C2 Decoder IP
Description
Ubiso DVB-C2 IP is a highly optimized DVB-C2 Decoder solution designed by Ubiso for next generation cable digital television reception.
Ubiso DVB-C2 IP converts demodulated I/Q signals into a bit stream for use by the video decoder. This includes all de-interleaving, FEC decoding and output processing.
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Product Brief

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Key Features
- All DVB-C2 modes
- Dedicated DVB-C2 Pre-Processing with Resource Sharing
- Processing one data and one common PLP concurrently in same or different data slices
- Frequency Deinterleaving
- Time-, Parity- and Bit Deinterleaving
- QAM Demultiplexing
- Depadding and depuncturing of L1 part 2 data
- FEC frame haeader detector and decoder
- I/Q mapping to LLR values
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- Optimized high performance FEC engine
- Single LDPC/BCH Decoder shared for all modes
- FEC engine parameters optimized for target throughput / application
- DVB-C2 PLH & L1 Decoding
- Output Processing
- TS / GSE / GFPS / GCS output
- De-Jitter Buffering and PLP Re-combination into single output stream
- Standard AHB Interfaces for Host control and Memory Access
- Optimized compile options targeted for ASIC and FPGA applications
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Ubiso DVB-C2 IP in a DVB-C2 receiver (either iDTV or set-top box) application:

Block Diagram of DVB-C2 IP:

Contact us for more information
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