Ubiso - IP: IEEE802.3bj-RS-FEC-Decoder

IEEE 802.3bj RS- FEC Decoder

Description

Ubiso RS-FEC Decoder IP is a highly optimized Reed Solomon Decoder designed by Ubiso for the IEEE 802.3bj standard.

The Reed Solomon codeword can be fed partially parallelized to the Decoder IP. The factor of parallelism can be chosen by the user. Additionally a fully pipelined architecture make the IP suitable for high speed applications.









Product Brief

 

Key Features

  • IEEE 802.3bj conform
  • Fully pipelined architecture
  • Parallelized Galois Field Inputs
  • Parallelized Syndrome Calculation
  • Erase Decoding optional available








 

  • Solving Key equation with modified euclid algorithm
  • Fully pipelined and parallelized Chien-Forney error calculation
  • Parallel output stream
  • Optimized compile options targeted for ASIC and FPGA applications

Ubiso IEEE802.3bj RS-FEC Decoder IP Top-Level Block Diagram

Block Level Diagram

A possible configuration of IP for IEEE802.3bj:

  • RS(n,k,t,m)                    : RS(528,514,7,10)
  • Field Polylnomial           :
  • Generator Polynomial    :
  • Parallelism                    : P=16

This will result in a IP that can handle 16 Galois Fields in parallel, resulting in a throughput of 160 bits per clock. The IP can correct up to 7 errors or 14 errors with erasure decoding (optional)

  • The IP receives the Reed-Solomon codeword and buffers the codeword in the FEC memory
  • While receiving data the “Syndome Calculator” calculates the syndromes
  • (optional) The IP calculates the erasure plynomial on the fly for erasure decoding
  • (optional) The Forney syndromes are calculated
  • The syndromes are passed to the modified Key-Equation Solver, performing the tasks of
    • calculating the error magnitude polynomial
    • calculating the error locator polymial
  • The error locator and error magnitude polynomial are passed to “Chien Forney Solver”, which
    • calculates error positions
    • calculates error values
  • The error positions and error values are passed to the Corrector, which
    • reads the codeword from memory
    • corrects the codeword
    • transfers corrected codeword to output

 

The IP is flexible and can be easily adjusted to other configurations.



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